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The chiplet revolution

Loïc Hamon
4 Jan 2024
capgemini-engineering

Transforming the semiconductor landscape and creating unprecedented opportunities

The semiconductor industry is standing at the edge of a profound transformation, thanks to the advent of a game-changing technology: chiplets.

Throughout its history, the semiconductor industry has pursued relentless integration and miniaturization. However, the escalating costs and complexities associated with cutting-edge Integrated Circuits (ICs) on advanced semiconductor technology have led to a revolutionary alternative approach: chiplets.

Most contemporary chips are designed as a monolithic SoC (System-on-Chip), integrating all essential functions—such as the processor cores, domain-specific hardware accelerator, memory, and interfaces — into a monolithic die, ie everything is built into an integrated circuit on a single piece of semiconductor.

Chiplets are a game-changer. They consist of a self-contained semiconductor die that, when combined with other dies through advanced packaging techniques, forms a complex integrated circuit similar to a monolithic integrated circuit. This modular approach enhances scalability, cost-efficiency, and performance. It also enables the integration of diverse functions, such as general-purpose processing, domain-specific processing, and memory into a single system, overcoming some limitations of traditional monolithic designs.

The chiplet approach not only addresses the challenges of rising costs and complexities but also unlocks unparalleled flexibility. Heterogeneous chiplet designs enable tailored solutions for specific applications or market segments. Solution providers can modify or add relevant chiplets without disrupting the overall system, resulting in reduced development costs and faster time-to-market, as redesign efforts only affect the package or additional domain-specific dies, not the entire chip.

There are still crucial challenges in the chiplet domain such as power and thermal management. Effective multi-vendor support is required to manage those aspects across all integrated chiplets seamlessly. And the standardization of interfaces and testing will be vital to ensure seamless integration, though, notably, organizations such as the Open Compute Project and UCIe (Universal Chiplet Interconnect Express) have already released specifications for open source chiplet interconnect characteristics.

Semiconductor giants such as Intel, Nvidia, and AMD have been quick to adopt chiplet technology, successfully demonstrating its viability in manufacturing, testing, and packaging as chiplet adoption gains momentum, the development of an ecosystem of suppliers is underway to serve its needs in areas such as packaging and thermal management. This will facilitate more widespread implementation across the industry, transcending adoption, reducing over-reliance on a few major players.

The growing popularity of chiplet designs has sparked interest across the entire semiconductor value chain, including Intellectual Property (IP) and Electronic Design Automation (EDA) vendors.

Beyond the leading semiconductor companies, the chiplet approach presents opportunities for design houses and semiconductor service providers like Capgemini. Collaboratively developed General-Purpose chiplet dies can cater to a range of vertical applications, for example serving a consortium of automotive companies pursuing in-car digital services. Additionally, Domain-Specific chiplets or custom dies can be tailored to meet specific requirements.

In conclusion, chiplets represent a flexible, adaptable, and cost-effective alternative to traditional monolithic designs. With its potential to revolutionize chip design, packaging, and integration, the chiplet paradigm is poised to redefine the semiconductor landscape, driving innovation and efficiency across the industry.

Author

Loïc Hamon

Head of Center of Excellence Silicon Engineering, Capgemini 
Loïc’s passion is to expand the business’ silicon engineering capability. Before Capgemini, he served as Vice President, Corporate Development and Strategic Marketing at Kalray. Loïc holds a Master’s in Marketing Intelligence from the HEC School of Management, a Master’s in Electrical Engineering from ESIGELEC and a postgraduate in Microelectronics from Paris XI University.