060018-Sr. RTL Design Engineer


Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.


This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.


Click the following link for more information on your rights as an Applicant – http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law


About Capgemini


Capgemini is a global leader in consulting, digital transformation, technology and engineering  services. The Group is at the forefront of innovation to address the entire breadth of clients’ opportunities in the evolving world of cloud, digital and platforms. Building on its strong 50-year+ heritage and deep industry-specific expertise, Capgemini enables organizations to realize their business ambitions through an array of services from strategy to operations. Capgemini is driven by the conviction that the business value of technology comes from and through people. Today, it is a multicultural company of 270,000 team members in almost 50 countries. With Altran, the Group reported 2019 combined revenues of €17billion.



Visit us at www.capgemini.com. People matter, results count.


The RTL Engineer performs detailed block design from system requirements and evolving specifications. Perform RTL coding, Lint checks, CDC tests, creating timing constraint file. Working closely with Synthesis, STA, PD and DFT teams to meet all functional requirements, performance, power, and area goals

•Develop HW architecture from specification documents. 
•Take complete responsibilities include writing RTL code for IP development/RTL integration, checking the code for Lint/CDC issues, checking synthesizability and timing quality of the design, checking low power implementation, supporting verification team with debug and support physical design teams on timing constraints and other design topics using Verilog/System Verilog/VHDL.  
•Develop and execute low power design (UPF/CPF).  
•Design top level RTL, integration of blocks, clocks, resets, configuration registers, etc
•Knowledge of JESD204C block design and related design/verification experience (includes licensed IP & PHY from 3rd parties)
•Awareness of DFT concepts to be used to fix functional violation that may get introduced which including DFT structures. 
•Carry out static checks including Lint/CDC (Spyglass), synthesis, LEC and STA.  Debugging and fixing functional break.  
•Take ownership of tasks and drive tasks to closure.  

•Bachelor’s Degree in electrical or Computer Engineering or related field
•7+ years of experience in Logic (RTL) Design

·5+ years of experience in one of the following 3 areas:
1.CPU architectures (holistic view including instructions, translation, operating modes, and exception models), CPU toolchains (cross-compile with assembler, linker, linker descriptors, etc), CPU assembly coding (with the understanding of writing/debugging testcode)
2.CPU, GPU – pipelines, control, Memories hierarchies, interconnects, caches, CPU, GPU (coherency, multilevel and distributed)
3.Verification tool development – OO programming, CPU/GPU/fabric/SoC tool development. Strong scripting, C, C++, Python experience
·Extensive experience debugging designs as well as creating simulation environments
·In depth knowledge of verification principles, testbenches, stimulus generation, UVM/OVM, and coverage
·Scripting language such as Python or Perl preferred
·System Verilog functional coverage (coding, debugging, closure)


Applications Consultants have expertise in a specific technology environment.  They are responsible for software-specific design and realization, as well as testing, deployment and release management, or technical and functional application management of client-specific package based solutions (e.g. SAP, ORACLE).  These roles also require functional and methodological capabilities in testing and training.


Required Skills and Experience:


You are an expert in one or more business processes and technology practices and are accountable for translating a business case into a detailed technical design. Alternatively, you are responsible for operational and technical issues and translate technical blueprints into requirements and specifications. You may also be responsible for integration testing and user acceptance testing. You act as a stream lead, guiding team members by experience. You are seen as active member within technology communities.


• Qualification: 7-10 years (3 years min relevant experience in the role)  experience, Bachelor’s Degree.

• Certification: SE level 1 and seeking level 2.

• Must have experience in Package Configuration.

• Should be proficient in Business Analysis, Business Knowledge, Testing, Architecture Knowledge, Technical Solution Design and Vendor Management.


Candidates should be flexible / willing to work across this delivery landscape which includes and not limited to Agile Applications Development, Support and Deployment.



Posted on:

December 14, 2021

Experience level:


Education level:

Bachelor's Degree (±16 years)

Contract type:


Business units:

DEMS (us-en)